Filter
Top Products
Loop
filter
X1
15.3 MHz
Q2, D5, D6
RX VCO2
Q1, D1, D2
RX VCO1
TX VCO
Q3, D9, D10
PLL control signals from the CPU (IC18)
PLL unlock signal
to the CPU (IC18, pin 73)
15.3 MHz
reference frequency signal
• PLL CIRCUIT
Buffer
Q4
Buffer
Q6
Buffer
Q5
to transmitter circuit
to 1st mixer circuit
D15
D14
BPF
PLST
SSD
SCK
4
11
6
10
14
15
16
PLL IC (IC1)
Shift register
Prescaler
Phase
detector
Divide
ratio
adjustment
Charge
pump
Programmable
divider
Reference
divider
CPU5V
regurator
+5V
regurator
VREF
regurator
S5V
regurator
T5V
regurator
R5V
regurator
Power switch
Q30, Q31
Q12, Q13, Q8
IC9
IC6
Q14
Q15
Q16
HV
VCC
CPU5V
CPU
+5V
VREF
S5V
“S5C”
Voltage line
Control signal
8
28
26
27
“T5C”
“R5C”
T5V
Receiver circuits
Attached optional units,
AF amplifier controller
(FRONT UNIT; Q501, Q502, D508),
etc.
CPU (IC18),
EEPROM (IC19),
etc.
PLL IC (IC1),
Base band IC (IC5),
etc.
PLL IC (IC1)
Transmitter circuits
R5V
(IC18)
Attached optional units,
D/A converters,
etc.
Battery pack
The buffer-amplifi ed VCO output signals from the tunable BPF
(L601−L603, C601−C607) are applied to the PLL IC (IC1,
pin 6). The applied signals are divided at the prescaler and
programmable counter according to the “SSD” signal from the
CPU (IC18, pin 10). The divided signal is phase-compared with
the reference frequency signal from the reference frequency
oscillator (X1), at the phase detector.
The phase difference is output from pin 4 as a pulse type signal
after being passed through the internal charge pump. The output
signal is converted into the DC voltage (lock voltage) by passing
through the loop fi lter (R7, R8, R12, C14, C16, C19). The lock
voltage is applied to the varacter diodes (D1 and D2 of RX
VCO1, D5 and D6 of RX VCO2, D9 and D10 of TX VCO) and
locked to keep the VCO frequency constant.
If the oscillated signal drifts, its phase changes from that of
the reference frequency, causing a lock voltage change to
compensate for the drift in the VCO oscillating frequency.
5-4 POWER SUPPLY CIRCUITS (MAIN UNIT)
Voltage from the attached battery pack is routed to whole of the circuit in the transceiver via switches and regulators.
5 - 4