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TS-440S
SEMICONDUCTO
R
MB8418-LP20-GRA (Control unit 1050
)
,uPD7800
Memoria
l
Alle
y
128 x16
x
8
0E0
A4
n
a
A3
0
.~
S
}CA
B
Addres s
buffe
r
--
I
T
Inpu
t
buffe
I/O gat
e
column decode
r
I
/0
buffe
r
WR
WE
Lo
w
decode
r
Addres
s
buffer
L
CAB
Symbol
Pin nam
e
Ao—A
10
Address inpu
t
I(1
— II
Ix
Data in/ou
t
CS
Chip select
1
CS
2
Chip select
2
WE
Write enabl
e
Vcc
Power (1
.5 V
)
GND
GN
D
NC
.
No connection
mo
o
GN
D
AI
O
OE1
0
TL
B
(IC4)
Q5
0
D
e,
cs
e
Inpu
t
buffer
CS
B
cs
,
Y1
7
I
SN74LS138
T
+5
V
BAT
T
MBM27128 (Control unit IC52)
---~
—~
O
lO
x
—
I/O
Dolt)
—
Data outpu
t
00
0 7
'
~~
—
+15 V
Vc
c
RD
GN
D
VP
P
pPD7800
17
Pin nam
e
+15 V
--
.
-
v
Y0
0
Yt
O
15
1
4
SN74LSI38
O
E
C
E
PG
M
o
A
O
Aa
Output enabl
e
Chip enabl
e
Prog, roglc
Y decode
r
X decoder
Output Buffe
r
Y selectio
n
131072
bi
t
(512
x 256
)
Memoria
l
all
y
}BP
D
780
0
Ao—A
13
Address inpu
t
Oo
—
O7
Data outpu
t
CE
Chip enable inpu
t
OE
Output enable inpu
t
PGM
Program inpu
t
Vcc
Power supply
Vpp
Program power suppl
y
GND
GN
D
30