Guide to Cell/B.E. Programming Documentation
Version 1.0, August 2008 © 2008 Sony Computer Entertainment Inc. All Rights Reserved.
Page 8 of 16
General Cell/B.E. Programming Documents
CBE Registers
Cell Broadband Engine Public Information and Downloads
http://cell.scei.co.jp/e_download.html
Length
358 pages.
Audience
Assembly-language programmers writing application or system programs.
Content
Hardware and software details of how the problem-state (user) and privilege-state (supervisor) registers operate. The
register fields are illustrated, bit-by-bit, and their functions are described. All registers are considered to be memory-
mapped I/O (MMIO) registers, whether or not the registers are associated with an I/O device. An MMIO register is any
internal or external register that is accessed through the main-storage space with load and/or store instructions.
Recommended Use
Use this document throughout software development, together with the CBE Programming Handbook and other PPE
and SPE reference documents.
Document Sections
The document has the following sections:
1. Cell Broadband Engine Memory-Mapped I/O Registers: The base addresses and offset ranges of all CBE registers.
2. PowerPC Processor Element (PPE) MMIO Registers: Registers used by for the PPE.
3. Synergistic Processor Element MMIO Registers: Registers used by the SPEs.
4. BEI I/O Command (IOC) MMIO Registers: Registers used by the I/O interface controller for commands.
5. IOC Address Translation MMIO Registers: Registers used by the I/O interface controller for address translation.
6. Internal Interrupt Controller (IIC) MMIO Registers: Registers used by the internal interrupt controller.
7. Memory Interface Controller (MIC) MMIO Registers: Registers used by the memory interface controller.
8. Token Manager (TKM) MMIO Registers: Registers used by the token manager.
9. CBE Distribution (BED) of I/O MMIO Registers: Registers used by the CBE distribution bus.
10. Element Interconnect Bus (EIB) MMIO Registers: Registers used by the element interconnect bus, which handles
communication between the PPE, SPEs, memory, and I/O devices.
11. Pervasive MMIO Registers: Registers used by the pervasive logic, which performs power management, thermal
management, clock control, software-performance monitoring, and trace analysis.
12. PowerPC Processor Element Special Purpose Registers: Special purpose registers (SPRs) used in privileged state
by the PPE and read or written using special PowerPC instructions.
Recommended Prerequisites
Read or browse:
CBE Programming Handbook
Further Details
See:
PowerPC Microprocessor Family: The Programming Environments Manual for 64-Bit Microprocessors
Cell Broadband Engine Architecture
PowerPC Architecture Books I, II, and III
