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TS-440S
CIRCUIT DESCRIPTIO
N
pulses and U/D signals from two clock signals which are 90
°
out of phase with each other, and sends the pulses and sig-
nals to the 7800
. A clock pulse interrupts the 7800 and
a
U/D signal causes the 7800 to perform a count up or dow
n
operation for each step
. If fast rotation occurs, the 780
0
processes several steps of PLL data at one time
.
Voltages from the RIT and IF shift VRs are converted fro
m
analog to digital by the A/D convertor IC (4052) and fed int
o
the 7800
. The voltages are used to drive the display and ar
e
reflected in the PLL data
.
The digital control circuit contains two 8255's for extende
d
I/O
. The 8255 in control unit A is an outputonly element an
d
the 8255 in control unit B is an inputonly element for ke
y
scan and static data
. The output 8255 emits VS-1 signals,
PLL data for the 6147, clock signals, and 1 MHz LED data
.
The input 8255 receives key scan data such as panel switc
h
data and DIP switch data for CAR compensation
. It als
o
receives static data which cannot be entered as a portion ke
y
scan data
.
The 7800 outputs four bits of band and mode informatio
n
(11 bands in the frequency range from 30 kHz to 30 MHz)
.
Each time the 8251, used as the interface to a personal com
-
puter, receives one byte of data, the 7800 is interrupted an
d
reads the data from the 8251
. The 7800 analyzes any com-
mand in the data
. In response to the command, the 780
0
controls setting or writes data to the 8251 as required
. Th
e
8251 serially sends one byte of data including a start bit, syn
-
chronizing to a 4800 Hz clock signal
.
RIT IF-SNIF
T
En<mer
count pufs
e
Enc
.
.
u/C s
.9no
l
n ock s,gno
l
A/O converter data
Made lnfnrmaY
Y
O,
:A LEO)
e
/0 control
,E
,
_SB,US0,CW,AM,FM,FSH1
)CIOAk,por',select
t
Tx
e'•al
0,1
Seeial o
t
,O
)
Outdo
.
;clock dot)-
,
Band ,nformofion
(PLC
.195)58,FIP
. 630
0
Enable 2
;
Power down IPO
I
(PLL
:145158,Fi P
.6300
1
Peounwa
l
1825`IAI,l8)
e
825)
)
PIP
C
L
_ J
Rs-232
C
85-I
converter C
S
(Address s rt)
Ton
e
AF Mole (MY)
conirallTON
)
LE
D
PP
Mule 1590)
(M SCR, IMU
,
PLL do
Lock
)
.
.
.too,
dota
l
OPTION
Vs
-
Ines,
I
Lack S
W
AT S
W
MIC UP/DOWN S
W
PTT S
W
vs-I
dos,
.
Key sca
n
0 ke
y
V, SCAN, CLEA
R
.
.,N
. EN
T
tT
,
Et,
T,T-FSE
TA/
B
SPRIT, A=
9
VOICE U
DOW
N
\CAN SW
i
pra NOn
/
'
Fig
. 13 Control
circuit block diagra
m
18