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Chapter 7: BIOS
7-11
XAdvanced Chipset Control
Access the submenu to make changes to the following settings.
Warning: Use caution when changing the Advanced settings. Incorrect setup,
a very high DRAM frequency or an incorrect DRAM timing may cause the sys-
tem become unstable. If this occurs, reset the stting to the default setting.
Crystal Beach Features
Select Enabled to use Intel's I/O AT (Acceleration Technology) to accelerate the
performance of TOE devices. (A TOE device is a specialized, dedicated processor
that is installed on an add-on card or a network card to handle some or all packet
processing of the add-on card. For this serverboard, the TOE device is built inside
the ESB2 South Bridge chip.) The options are Enabled and Disabled.
SERR Signal Condition
This setting specifi es the ECC Error conditions that an SERR# is to be asserted.
The options are None, Single Bit, Multiple Bit, and Both.
4GB PCI Hole Granularity
This feature allows you to select the granularity of PCI hole for PCI slots. If MTRRs
are not enough, this option may be used to reduce MTRR occupation. The options
are: 256 MB, 512 MB, 1GB and 2GB.
Azalia Audio
Select Auto to allow BIOS to automatically enable the onboard Azalia audio if de-
tected. The options are Auto and Disabled.
Route Port 80h Cycles to
This feature allows the user to decide which bus to send debug information to. The
options are Disabled, PCI and LPC.
Enabling Multi-Media Timer
Select Yes to activate a set of timers that are alternative to the traditional 8254
timers for the OS use. The options are Yes and No.
USB Host Controller 1
Select Enabled to activate USB Host Controller 1. The settings are Enabled and
Disabled.