Programmer’s Reference
ARM DUI 0125A
© Copyright ARM Limited 1999. All rights reserved.
4-7
4.3 Core module registers
The core module status and control registers allow the processor to determine its
environment and to control some core module operations. The registers, listed in Table
4-2, are located at 0x10000000 and can only be accessed by the local processor.
Note
All registers are 32-bits wide and do not support byte writes. Write operations must be
wordwide. Bits marked as reserved in the following sections should be preserved using
read-modify-write operations.
Table 4-2 Core module status, control, and interrupt registers
Register Name Address Access Description
CM_ID 0x10000000 Read Core module identification register
CM_PROC 0x10000004 Read Core module processor register
CM_OSC 0x10000008 Read/write Core module oscillator values
CM_CTRL 0x1000000C Read/write Core module control
CM_STAT 0x10000010 Read Core module status
CM_LOCK 0x10000014 Read/write Core module lock
CM_SDRAM 0x10000020 Read/write SDRAM status and control
CM_IRQ_STAT 0x10000040 Read Core module IRQ status register
CM_IRQ_RSTAT 0x10000044 Read Core module IRQ raw status register
CM_IRQ_ENSET 0x10000048 Read/write Core module IRQ enable set register
CM_IRQ_ENCLR 0x1000004C Write Core module IRQ enable clear register
CM_SOFT_INTSET 0x10000050 Read/write Core module software interrupt set
CM_SOFT_INTCLR 0x10000054 Write Core module software interrupt clear
CM_FIQ_STAT 0x10000060 Read Core module FIQ status register
CM_FIQ_RSTAT 0x10000064 Read Core module FIQ raw status register
CM_FIQ_ENSET 0x10000068 Read/write Core module FIQ enable set register
CM_FIQ_ENCLR 0x1000006C Write Core module FIR enable clear register
CM_SPD 0x10000100 to 0x100001FC Read SDRAM SPD memory
