Programmer’s Reference
4-18
© Copyright ARM Limited 1999. All rights reserved.
ARM DUI 0125A
not64
CMP r5,#0x80 ; is it 128MB?
BNE not128 ; if no, move on
MOV r6,#0xe ; store size and CAS latency of 2
B writesize
not128
; if it is none of these sizes then it is either 256MB, or
; there is no SDRAM fitted so default to 256MB.
MOV r6,#0x12 ; store size and CAS latency of 2
writesize
MOV r1,r1,ASL#8 ; get row address lines for SDRAM register
ORR r2,r1,r2,ASL#12 ; OR in column address lines
ORR r3,r2,r3,ASL#16 ; OR in number of banks
ORR r6,r6,r3 ; OR in size and CAS latency
LDR r0, =CM_BASE ; point at module registers
STR r6,[r0,#0x20] ; store SDRAM parameters
