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PowerEdge R210 Technical Guide 36
8.12 Real-Time Clock (RTC)
The Ibex Peak contains a real-time clock with 256 bytes of battery-backed RAM.
The real-time clock performs two key functions: keeping track of the time of day and storing
system data, even when the system is powered down. The RTC operates on a 32.768 KHz
crystal and a 3 V battery.
The RTC also supports two lockable memory ranges. By setting bits in the configuration space,
two 8-byte ranges can be locked to read and write accesses. This prevents unauthorized
reading of passwords or other system security information.
The RTC also supports a date alarm that allows for scheduling a wake up event up to 30 days in
advance, rather than just 24 hours in advance.
8.13 GPIO
Various general purpose inputs and outputs are provided for custom system design. The number
of inputs and outputs varies depending on Ibex Peak configuration.
8.14 Enhanced Power Management
The Ibex Peak’s power management functions include enhanced clock control and various low-
power (suspend) states (e.g., Suspend-to-RAM and Suspend-to-Disk). A hardware-based thermal
management circuit permits software-independent entrance to low-power states. The Ibex
Peak contains full support for the Advanced Configuration and Power Interface (ACPI)
Specification, Revision 3.0a.
8.15 System Management Features
In addition to Intel AMT, the Ibex Peak integrates several functions designed to
manage the system and lower the total cost of ownership (TCO) of the system. These
system management functions are designed to report errors, diagnose the system, and
recover from system lockups without the aid of an external microcontroller.
8.15.1 TCO Timer
The Ibex Peak’s integrated programmable TCO (Total Cost of Ownership) timer is used
to detect system locks. The first expiration of the timer generates an SMI# that the
system can use to recover from a software lock. The second expiration of the timer
causes a system reset to recover from a hardware lock.
8.15.2 Processor Present Indicator
The Ibex Peak looks for the processor to fetch the first instruction after reset. If the
processor does not fetch the first instruction, the Ibex Peak will reboot the system.
8.15.3 Error Code Correction (ECC) Reporting
When detecting an ECC error, the host controller has the ability to send one of several
messages to the Ibex Peak. The host controller can instruct the Ibex Peak to generate
an SMI#, NMI, SERR#, or TCO interrupt.