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LXD386 — Evaluation Board for Quad T1/E1 Applications
20 Developer Manual
5.0 Evaluation Board Schematics
Figure 9. Evaluation Board Schematic — Data/Control
DATA/CONTROL A4
FIREBIRD - LXD386 DEMO BOARD
B
16Wednesday, September 15, 1999
Title
Size Document Number Rev
Date: Sheet
of
VCC
VCC
VCC
VCC
VCC
CLKE
MOT/INTL
MUX
A0
R/W/RD
DLOOP2/D6
LOOP0/D0
LOOP1/D1
DLOOP3/D7
OE
LOOP2/D2
DLOOP0/D4
DS/WR/SDI
ALE/SCLK/AS
CS
LOOP3/D3
DLOOP1/D5
LOS3
LOS2
LOS1
LOS0
MCLK
A2
A1
MODE
A3
MOT/INTL
DS/WR/SDI
R/W/RD
ALE/SCLK/AS
CS
TCK
TMS
AT1
TDO
TDI
TRST
AT2
A4
MUX
ACK/RDY/SDO
MUX
ALE/SCLK/AS
LOOP1/D1
MOT/INTL
LOOP3/D3
DLOOP1/D5
DLOOP3/D7
A1
A3
CS
CLKE
R/W/RD
DS/WR/SDI
ACK/RDY/SDO
DLOOP2/D6
LOOP0/D0
LOOP2/D2
DLOOP0/D4
A0
A2
A4
INT
INT
TDI
TDO
TCK
TMS
TRST
MODE
OE
R6
100K
R9
100K
R7
100K
R10
100K
R5
100K
C3 .1uF
JP2
HEADER 4X2
12
34
56
78
R11
100K
R12
100K
C4 .1uF
C2 .1uF
C1 .1uF
C5 .1uF
JP1
C6 .1uF
R4
10K
CON1A
96 Pin DIN Connector Male
a1
a2
a3
a4
a5
a6
a7
a8
a9
a10
a11
a12
a13
a14
a15
a16
a17
a18
a19
a20
a21
a22
a23
a24
a25
a26
a27
a28
a29
a30
a31
a32
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
CON1B
96 Pin DIN Connector Male
b1
b2
b3
b4
b5
b6
b7
b8
b9
b10
b11
b12
b13
b14
b15
b16
b17
b18
b19
b20
b21
b22
b23
b24
b25
b26
b27
b28
b29
b30
b31
b32
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
CON1C
96 Pin DIN Connector Male
c1
c2
c3
c4
c5
c6
c7
c8
c9
c10
c11
c12
c13
c14
c15
c16
c17
c18
c19
c20
c21
c22
c23
c24
c25
c26
c27
c28
c29
c30
c31
c32
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
R1
4.7K
U1A
LXT386
78
79
84
99
1
80
81
3
2
82
98
83
90
91
92
93
94
95
96
97
72
71
69
73
70
25
18
58
51
76
77
89
10
5
11
7
8
4
9
6
88
87
86
85
68
67
75
66
65
74
MCLK
MODE
CLKE
MUX
MOT/INTL
INT
ACK/RDY/SDO
DS/WR/SDI
R/W/RD
ALE/SCLK/AS
CS
OE
LOOP0/D0
LOOP1/D1
LOOP2/D2
LOOP3/D3
LOOP4/D4
LOOP5/D5
LOOP6/D6
LOOP7/D7
TRST
TMS
TCK
TDO
TDI
LOS0
LOS1
LOS2
LOS3
AT2
AT1
A4
GND_0
GNDIO
GND_1
GND_DIG
VCC_0
VCCIO
VCC_1
VCC_DIG
A3
A2
A1
A0
VCC_2
VCC_3
VCC_ANA
GND_2
GND_3
GND_ANA
R2
10K
R3
10K
R8
100K
LEVEL ONE COMMUNICATIONS
JTAG PORT