1.3FunctionalBlockDiagram
Configuration bus
DMA memory
transfer controller
Peripheral bus
EMAC control module
EMAC module MDIO module
G/MII bus MDIO bus
EMAC/MDIO
interrupts
ARM interrupt
controller
4
Introduction
•No-chainmodetruncatesframetofirstbufferfornetworkanalysisapplications.
•Emulationsupport.
•Loopbackmode.
Figure1showsthethreemainfunctionalmodulesoftheEMAC/MDIOperipheral:
•EMACcontrolmodule
•EMACmodule
•MDIOmodule
TheEMACcontrolmoduleisthemaininterfacebetweenthedevicecoreprocessorandtheEMAC
moduleandMDIOmodule.TheEMACcontrolmodulecontainsthenecessarycomponentstoallowthe
EMACtomakeefficientuseofdevicememory,plusitcontrolsdeviceinterrupts.TheEMACcontrol
moduleincorporates8K-byteinternalRAMtoholdEMACbufferdescriptors.
TheMDIOmoduleimplementsthe802.3serialmanagementinterfacetointerrogateandcontrolupto32
EthernetPHYsconnectedtothedevice,usingasharedtwo-wirebus.HostsoftwareusestheMDIO
moduletoconfiguretheautonegotiationparametersofeachPHYattachedtotheEMAC,retrievethe
negotiationresults,andconfigurerequiredparametersintheEMACmoduleforcorrectoperation.The
moduleisdesignedtoallowalmosttransparentoperationoftheMDIOinterface,withverylittle
maintenancefromthecoreprocessor.
TheEMACmoduleprovidesanefficientinterfacebetweentheprocessorandthenetworkedcommunity.
TheEMAConthisdevicesupports10Base-T(10Mbits/second)and100BaseTX(100Mbits/second)in
eitherhalf-duplexorfull-duplexmodeand1000BaseT(1000Mbits/second)infull-duplexmode,with
hardwareflowcontrolandquality-of-service(QOS)support.
Figure1.EMACandMDIOBlockDiagram
Figure1alsoshowsthemaininterfacebetweentheEMACcontrolmoduleandtheCPU.Thefollowing
connectionsaremadetothedevicecore:
•TheperipheralbusconnectionfromtheEMACcontrolmoduleallowstheEMACmoduletoreadand
writebothinternalandexternalmemorythroughtheDMAmemorytransfercontroller.
•TheEMACcontrolmodule,EMAC,andMDIOallhavecontrolregisters.Theseregistersare
memory-mappedintodevicememoryspaceviathedeviceconfigurationbus.Alongwiththese
registers,thecontrolmodule’sinternalRAMismappedintothissamerange.
•TheEMACandMDIOinterruptsarecombinedintoasingleinterruptwithinthecontrolmodule.The
interruptfromthecontrolmodulethengoestotheARMinterruptcontroller.
SPRUEQ6–December2007EthernetMediaAccessController(EMAC)/ManagementDataInput/Output(MDIO)13
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