48TransmitInterruptMaskSetRegister(TXINTMASKSET)FieldDescriptions......................................93
49TransmitInterruptMaskClearRegister(TXINTMASKCLEAR)FieldDescriptions................................94
50MACInputVectorRegister(MACINVECTOR)FieldDescriptions...................................................95
51MACEndOfInterruptVectorRegister(MACEOIVECTOR)FieldDescriptions...................................95
52ReceiveInterruptStatus(Unmasked)Register(RXINTSTATRAW)FieldDescriptions..........................96
53ReceiveInterruptStatus(Masked)Register(RXINTSTATMASKED)FieldDescriptions.........................97
54ReceiveInterruptMaskSetRegister(RXINTMASKSET)FieldDescriptions......................................98
55ReceiveInterruptMaskClearRegister(RXINTMASKCLEAR)FieldDescriptions................................99
56MACInterruptStatus(Unmasked)Register(MACINTSTATRAW)FieldDescriptions..........................100
57MACInterruptStatus(Masked)Register(MACINTSTATMASKED)FieldDescriptions.........................100
58MACInterruptMaskSetRegister(MACINTMASKSET)FieldDescriptions......................................101
59MACInterruptMaskClearRegister(MACINTMASKCLEAR)FieldDescriptions................................101
60ReceiveMulticast/Broadcast/PromiscuousChannelEnableRegister(RXMBPENABLE)FieldDescriptions102
61ReceiveUnicastEnableSetRegister(RXUNICASTSET)FieldDescriptions....................................105
62ReceiveUnicastClearRegister(RXUNICASTCLEAR)FieldDescriptions.......................................106
63ReceiveMaximumLengthRegister(RXMAXLEN)FieldDescriptions............................................107
64ReceiveBufferOffsetRegister(RXBUFFEROFFSET)FieldDescriptions........................................107
65ReceiveFilterLowPriorityFrameThresholdRegister(RXFILTERLOWTHRESH)FieldDescriptions.......108
66ReceiveChannelnFlowControlThresholdRegister(RXnFLOWTHRESH)FieldDescriptions...............108
67ReceiveChannelnFreeBufferCountRegister(RXnFREEBUFFER)FieldDescriptions......................109
68MACControlRegister(MACCONTROL)FieldDescriptions........................................................110
69MACStatusRegister(MACSTATUS)FieldDescriptions...........................................................112
70EmulationControlRegister(EMCONTROL)FieldDescriptions....................................................114
71FIFOControlRegister(FIFOCONTROL)FieldDescriptions........................................................114
72MACConfigurationRegister(MACCONFIG)FieldDescriptions...................................................115
73SoftResetRegister(SOFTRESET)FieldDescriptions..............................................................115
74MACSourceAddressLowBytesRegister(MACSRCADDRLO)FieldDescriptions............................116
75MACSourceAddressHighBytesRegister(MACSRCADDRHI)FieldDescriptions.............................116
76MACHashAddressRegister1(MACHASH1)FieldDescriptions.................................................117
77MACHashAddressRegister2(MACHASH2)FieldDescriptions.................................................117
78BackOffTestRegister(BOFFTEST)FieldDescriptions............................................................118
79TransmitPacingAlgorithmTestRegister(TPACETEST)FieldDescriptions.....................................118
80ReceivePauseTimerRegister(RXPAUSE)FieldDescriptions....................................................119
81TransmitPauseTimerRegister(TXPAUSE)FieldDescriptions...................................................119
82MACAddressLowBytesRegister(MACADDRLO)FieldDescriptions...........................................120
83MACAddressHighBytesRegister(MACADDRHI)FieldDescriptions............................................121
84MACIndexRegister(MACINDEX)FieldDescriptions...............................................................121
85TransmitChannelnDMAHeadDescriptorPointerRegister(TXnHDP)FieldDescriptions....................122
86ReceiveChannelnDMAHeadDescriptorPointerRegister(RXnHDP)FieldDescriptions....................122
87TransmitChannelnCompletionPointerRegister(TXnCP)FieldDescriptions..................................123
88ReceiveChannelnCompletionPointerRegister(RXnCP)FieldDescriptions...................................123
A-1PhysicalLayerDefinitions...............................................................................................134
SPRUEQ6–December2007ListofTables9
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