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2004 Jan 26 4
Philips Semiconductors Product specification
MPEG-2 video and MPEG-audio/AC-3
audio encoder with multiplexer
SAA6752HS
1.5 Stream multiplexer
• Multiplexing of video and audio streams according to the
MPEG-2 systems standard (
“ISO 13818-1”
)
• Generation and output of MPEG-2 Transport Streams
(TS), MPEG-2 Program Streams (PS), Packetized
Elementary Streams (PES) and Elementary Streams
(ES) compliant to the DVD, D-VHS and DVB standards
• MPEG time stamp (PTS/DTS/SCR/PCR) generation
and insertion (synchronization)
• Insertion of metadata
• Optional generation of empty time slots for subsequent
insertion of application specific data packets
• Optional insertion of user data in the GOP header and in
the picture header
• Optional automatic insertion of Closed Caption data
according to DVD or ATSC standard
• Optional generation of transport streams with variable
bit rate.
1.6 Output interface
• Parallel interface 8-bit master/slave output
• 3-state output port
• Glueless interfacing with IEEE 1394 chip sets (for
example, PDI 1394 L11)
• Data Expansion Bus Interface (DEBI) interface.
1.7 Control domain
• All control done via I
2
C-bus
• I
2
C-bus slave transceiver up to 400 kbit/s
• I
2
C-bus slave address select pin
• Host interrupt flag pin.
1.8 Other features
• Single external clock or single crystal 27 MHz
• Separate 27 MHz system clock output
• Interface voltage 3.3 V
• TTL compatible digital outputs
• Power supply voltage 3.3 and 2.5 V
• Boundary Scan Test (BST) supported
• Power-down mode
• Single SDRAM system memory (16 Mbit@16 bit or
64 Mbit@16 bit).
2 GENERAL DESCRIPTION
2.1 General
Philips Semiconductors’ second generation real time
MPEG-2 encoder, the SAA6752HS, is a highly integrated
single-chip audio and video encoding solution with flexible
multiplexing functionality. With our expertise in two critical
areas for consumer video encoding, noise filtering and
motion estimation, we have pushed the boundaries for
video quality even further, providing enhanced quality for
low bit rates and enabling increased recording times for a
given storage capacity. The SAA6752HS will also enable
a key driver for new consumer digital recording
applications and system cost reduction. By integrating all
audio encoding and multiplexing functionality we will be
moving from a three chip to a one chip system, with cost
efficient design and process technology, thus providing a
truly low cost, high quality encoding system.
The SAA6752HS/V104 is intended for customers whose
application does not require the DDCE function.
The SAA6752HS gives significant advantages to
customers developing digital recording applications:
• Fast time-to-market and low development
resources. By adding a simple external video input
processor IC, an audio analog-to-digital converter, and
an external SDRAM, analog video and audio sources
are compressed into high quality MPEG-2 video and
MPEG-1 layer 2 or AC-3 audio streams, multiplexed into
a single program or transport stream for simple
connection to various storage media or broadcast
media. Hence, making design effort for our customers a
minimum, as well as removing the need for in-depth
experience in MPEG encoding.
• Low system host resources. All video and audio
encoding algorithms and software are run on an internal
MIPS
(1)
processor. The SAA6752HS only requires a
small amount of communication from the system host
processor to set up and control required encoding
parameters via the I
2
C-bus.
(1) MIPS is a registered trademark of MIPS Technologies.