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2004 Jan 26 7
Philips Semiconductors Product specification
MPEG-2 video and MPEG-audio/AC-3
audio encoder with multiplexer
SAA6752HS
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5 BLOCK DIAGRAM
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ull pagewidth
MHC128
STREAM
MULTIPEXER
VIDEO
COMPRESSION
RESET
CONTROL
MIPS
®
CPU
GPIO RAM ROM TAP
STATIC
MEM
DEBUG
ONLY
I
2
C-BUS
I
2
C-bus
PI-bus
host interrupt reset boundary scan
SDRAM-INTERFACE
STREAM DOMAIN SCHEDULER
VIDEO
FRONT-END
system
clock
reference
system clock
output
SDRAM
16 Mbit @ 16-bit or 64 Mbit @ 16-bit audio clock
digital
video
input
digital
audio
input
SYSTEM
CLOCK
REFERENCE
CLOCK 27 MHz
external
clock
MPEG
output
OUTPUT
INTERFACE
AUDIO
COMPRESSION
AUDIO
INTERFACE
ROMRAM
SAA6752HS
Fig.1 Block diagram.