Intel SE7501WV2 Life Jacket User Manual


 
Configuration and Initialization Intel® Server Board SE7501WV2 TPS
Revision 1.0
Intel reference number C25653-001
42
100 MHz differentials: For INT3/FCPGA sockets, the MCH, and the ITP port.
66 MHz at 3.3 V logic levels: For MCH, P64H2, ICH3, and IDE RAID Controller clock
33.3 MHz at 3.3 V logic levels: Reference clock for ICH3, BMC, Video, SIO, and the IDE
RAID controllers
48MHz: ICH3-S, and SIO
14.318 MHz at 3.3V logic levels: ICH3-S, and video clocks
For information on processor clock generation, see the CK408B Synthesizer/Driver Specification.
The SE7501WV2 baseboard also provides asynchronous clock generators:
80-MHz clock for the embedded SCSI controller
25-MHz clock for the embedded Network Interface controllers
32-KHz clock for the ICH3-S RTC
The following figure illustrates clock generation and distribution on the SE7501WV2 server
board.