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19. G.706 INT ERMEDIATE CRC-4 UPDATING (E1 MODE ONLY)
The DS21Q55 can implement the G.706 CRC-4 recalculation at intermediate path points. When this
mode is enabled, the data stream presented at TSER will already have the FAS/NFAS, CRC multiframe
alignment word, and CRC-4 checksum in timeslot 0. The user can modify the Sa bit positions; this
change in data content will be used to modify the CRC-4 checksum. The modification, however, will not
corrupt any error information the original CRC-4 checksum might contain. In this mode of operation,
TSYNC must be configured to multiframe mode. The data at TSER must be aligned to the TSYNC
signal. If TSYNC is an input then the user must assert TSYNC aligned at the beginning of the multiframe
relative to TSER. If TSYNC is an output, the user must multiframe-align the data presented to TSER.
CRC-4 RECALCULATE METHOD Figure 21-1
TSER
XOR
CRC-4
CALCULATOR
EXTRACT
OLD CRC-4
CODE
INSERT
NEW CRC-4
CODE
MODIFY
Sa BIT
POSITIONS
NEW Sa BIT
DATA
+
TPOSO/TNEGO