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information.
TRANSMIT SIDE BOUNDARY TIMING, TSYSCLK = 2.048MHz (With Elastic
Store Enabled) Figure 35-21
NOTE:
1) TCHBLK is programmed to block channel 31.
LSB
F
LSB MSB
CHANNEL 1CHANNEL 32
A B C D A B
TSYSCLK
TSER
TSSYNC
TSIG
TCHCLK
TCHBLK
CHANNEL 31
A
CHANNEL 31 CHANNEL 32 CHANNEL 1
1
4
2,3
C D