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E1 ALARM CRITERIA Table 11-2
ALARM SET CRITERIA CLEAR CRITERIA
ITU
SPEC.
RLOS An RLOS condition exists on power-
up prior to initial synchronization,
when a re-sync criteria has been met,
or when a manual re-sync has been
initiated via E1RCR1.0
RCL
255 or 2048 consecutive zeros
received as determined by E1RCR2.0
In 255-bit times, at least 32
ones are received
G.775/G.962
RRA Bit 3 of nonalign frame set to one for
three consecutive occasions
Bit 3 of nonalign frame set
to zero for three consecutive
occasions
O.162
2.1.4
RUA1 Fewer than three zeros in two frames
(512 bits)
More than two zeros in two
frames (512 bits)
O.162
1.6.1.2
RDMA Bit 6 of timeslot 16 in frame 0 has
been set for two consecutive
multiframes
V52LNK Two out of three Sa7 bits are zero G.965