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11. I/O PIN CONFIGURATION OPTIONS
Register Name: IOCR1
Register Description: I/O Configuration Register 1
Register Address: 01h
Bit # 7 6 5 4 3 2 1 0
Name RSMS RSMS2 RSMS1 RSIO TSDW TSM TSIO ODF
Default 0 0 0 0 0 0 0 0
Bit 0/Output Data Format (ODF).
0 = bipolar data at TPOSO and TNEGO
1 = NRZ data at TPOSO; TNEGO = 0
Bit 1/TSYNC I/O Select (TSIO).
0 = TSYNC is an input
1 = TSYNC is an output
Bit 2/TSYNC Mode Select (TSM). Selects frame or multiframe mode for the TSYNC pin.
0 = frame mode
1 = multiframe mode
Bit 3/TSYNC Double-Wide (TSDW). (T1 only) (Note: this bit must be set to zero when IOCR1.2 = 1 or when IOCR1.1 = 0)
0 = do not pulse double-wide in signaling frames
1 = do pulse double-wide in signaling frames
Bit 4/RSYNC I/O Select (RSIO). (Note: this bit must be set to zero when ESCR.0 = 0)
0 = RSYNC is an output
1 = RSYNC is an input (only valid if elastic store enabled)
Bit 5/RSYNC Mode Select 1(RSMS1). Selects frame or multiframe pulse when RSYNC pin is in output mode. In input
mode (elastic store must be enabled) multiframe mode is only useful when receive signaling re-insertion is enabled.
0 = fra me mode
1 = multiframe mode
Bit 6/RSYNC Mode Select 2(RSMS2).
T1 Mode: RSYNC pin must be programmed in the output frame mode (IOCR1.5 = 0, IOCR1.4 = 0).
0 = do not pulse double wide in signaling frames
1 = do pulse double wide in signaling frames
E1 Mode: RSYNC pin must be programmed in the output multiframe mode
(IOCR1.5 = 1, IOCR1.4 = 0).
0 = RSYNC outputs CAS multiframe boundaries
1 = RSYNC outputs CRC4 multiframe boundaries
Bit 7/RSYNC Multiframe Skip Control (RSMS). Useful in framing format conversions from D4 to ESF. This function is not
available when the receive-side elastic store is enabled. RSYNC must be set to output multiframe pulses (IOCR1.5 = 1 and
IOCR1.4 = 0).
0 = RSYNC will output a pulse at every multiframe
1 = RSYNC will output a pulse at every other multiframe