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BIT PIN SYMBOL TYPE CONTROL BIT DESCRIPTION
53 48 TSIG I
52 49 TESO (NXA) O
51 50 TDATA (NXA) I
50 51 TSYSCLK I
49 52 TSSYNC I
48 53 TCHCLK O
47 - ESIBS1.cntl - 0 = ESIBS1 is an input; 1 = ESIBS1 is an output
46 54 ESIBS1 I/O
45 55 MUX I
44 – BUS.cntl – 0 = D0-D7/AD0-AD7 are inputs;
1 = D0–D7/AD0–AD7 are outputs
43 56 D0/AD0 I/O
42 57 D1/AD1 I/O
41 58 D2/AD2 I/O
40 59 D3/AD3 I/O
60 DV
SS
–
61 DV
DD
–
39 62 D4/AD4 I/O
38 63 D5/AD5 I/O
37 64 D6/AD6 I/O
36 65 D7/AD7 I/O
35 66 A0 I
34 67 A1 I
33 68 A2 I
32 69 A3 I
31 70 A4 I
30 71 A5 I
29 72 A6 I
28 73 A7/ALE(AS) I
27 74 RD*(DS*) I
26 75 CS* I
25 - ESIBRD.cntl - 0 = ESIBRD is an input;1 = ESIBRD is an output
24 76 ESIBRD I/O
23 77 WR*(R/W*) I
22 78 RLINK O
21 79 RLCLK O
80 DV
SS
–
81 DV
DD
20 82 RCLK O
83 DV
DD
–
84 DV
SS
–
19 85 RDATA (NXA) O
18 86 RPOSI I
17 87 RNEGI I
16 88 RCLKI I
15 89 RCLKO O
14 90 RNEGO O
13 91 RPOSO O
12 92 RCHCLK O
11 93 RSIGF O
10 94 RSIG O
9 95 RSER O
8 96 RMSYNC O