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RECEIVE SIDE TIMING, ELASTIC STORE ENABLED (T1 MODE) Figure 37-9
NOTES:
1) RSYNC is in the output mode.
2) RSYNC is in the input mode.
3) F-bit when CCR1.3 = 0, MSB of TS0 when CCR1.3 = 1.
F
t
t
R
t
D3
t
D4
t
D4
t
D4
t
t
SU
HD
RSER / RSIG
RCHCLK
RCHBLK
1
RSYNC
2
RSYNC
RSYSCLK
SL
t
t
SP
SH
t
t
D4
RMSYNC
SEE NOTE 3