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information.
RECEIVE SIDE BOUNDARY TIMING, RSYSCLK = 2.048MHz (With Elastic
Store Enabled) Figure 35-14
NOTES:
1) RSYNC is in the output mode (IOCR1.4 = 0).
2) RSYNC is in the input mode (IOCR1.4 = 1).
3) RCHBLK is programmed to block channel 1.
4) RSIG normally contains the CAS multiframe-alignment nibble (0000) in channel 1.
RSER
CHANNEL 1
RCHCLK
RCHBLK
RSYSCLK
RSYNC
CHANNEL 31 CHANNEL 32
1
3
RSYNC
2
RMSYNC
RSIG
CHANNEL 31 CHANNEL 32
C
DA B
CHANNEL 1
LSB MSB
LSB
MSB
C
DBA
Note 4