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32.2 E1 Mode
RECEIVE SIDE TIMING Figure 35-11
NOTES:
1) RSYNC in frame mode (IOCR1.5 = 0).
2) RSYNC in multiframe mode (IOCR1.5 = 1).
3) RLCLK is programmed to output just the Sa bits.
4) RLINK will always output all five Sa bits as well as the rest of the receive data stream.
5) This diagram assumes the CAS MF begins in the RAF frame.
FRAME#
1
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1
4
RLINK
RLCLK
3
RSYNC
1
RSYNC
RFSYNC
2