Xilinx 8.2i Life Jacket User Manual


 
Development System Reference Guide www.xilinx.com 109
Partlist File
R
Header
The first part is a header for the entry. The format of the entry looks like the following:
part architecture family partname diename packagefilename
Following is an example for the XCV50bg256:
partVIRTEX V50bg256 NA.die v50bg256.pkg
Device Attributes
The header is followed by a list of device attributes. Not all attributes are applicable to all
devices.
CLB row and column sizes: NCLBROWS=# NCLBCOLS=#
Sub-family designation: STYLE=sub_family
(For example, STYLE = Virtex2)
Input registers: IN_FF_PER_IOB=#
Output registers: OUT_FF_PER_IOB=#
Number of pads per row and per column: NPADS_PER_ROW=#
NPADS_PER_COL=#
Bitstream information:
Number of frames: NFRAMES=#
Number bits/frame: NBITSPERFRAME=#
The preceding bulleted items display for both the -p and -v options. The following bulleted
items are displayed only when using the -v option:
Number of IOBS in device: NIOBS=#
Number of bonded IOBS: NBIOBS=#
Slices per CLB: SLICES_PER_CLB=#
For slice-based architectures, such as Virtex.
(For non-slice based architectures, assume one slice per CLB)
Flip-flops for each slice: FFS_PER_SLICE=#
Latches for each slice: CAN BE LATCHES={TRUE|FALSE}
DLL blocks for Virtex, Virtex-E, Spartan-II, and Spartan-3 families, and DCMs for
Virtex-II, Virtex-IIP, and Virtex-4 families that include the DLL functionality.
LUTs in a slice: LUT_NAME=name LUT_SIZE=#
Number of global buffers: NUM_GLOBAL_BUFFERS=#
(The number of places where a buffer can drive a global clock combination.)