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Development System Reference Guide www.xilinx.com 277
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Chapter 15
BSDLAnno
BSDLAnno is compatible with the following families:
• Virtex
™
, Virtex
™
-E
• Virtex
™
-II
• Virtex
™
-II Pro, Virtex
™
-II Pro X
• Virtex
™
-4
• Virtex
™
-5 LX
• Spartan
™
-II, Spartan
™
-IIE
• Spartan
™
-3, Spartan
™
-3E, Spartan
™
-3L
• CoolRunner
™
XPLA3, CoolRunner
™
-II
• XC9500
™
, XC9500XL
™
, XC9500XV
™
This chapter contains the following sections:
• “BSDLAnno Overview”
• “BSDLAnno Syntax”
• “BSDLAnno Input Files”
• “BSDLAnno Output Files”
• “BSDLAnno Options”
• “BSDLAnno File Composition”
• “Boundary Scan Behavior in Xilinx Devices”
BSDLAnno Overview
The Boundary Scan Description Language (BSDLAnno) utility automatically modifies a
BSDL file for post-configuration interconnect testing. BSDLAnno obtains the necessary
design information from the routed .ncd file (FPGAs) or the design.pnx file (CPLDs), and
generates a BSDL file that reflects the post-configuration boundary scan architecture of the
device. The boundary scan architecture is changed when the device is configured because
certain connections between the boundary scan registers and pad may change. These
changes must be communicated to the boundary scan tester through a post-configuration
BSDL file. If the changes to the boundary scan architecture are not reflected in the BSDL
file, boundary scan tests may fail.
The Boundary Scan Description Language is defined by IEEE specification 1149.1 as “a
common way of defining device boundary scan architecture.” Xilinx provides both 1149.1
and 1532 BSDL files that describe pre-configuration boundary scan architecture.