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Development System Reference Guide www.xilinx.com 401
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CPLD
Complex Programmable Logic Device (CPLD). Is an erasable
programmable logic device that can be programmed with a schematic
or a behavioral design. CPLDs constitute a type of complex PLD based
on EPROM or EEPROM technology. They are characterized by an
architecture offering high speed, predictable timing, and simple
software.
The basic CPLD cell is called a macrocell, which is the CPLD
implementation of a CLB. It is composed of AND gate arrays and is
surrounded by the interconnect area.
CPLDs consume more power than FPGA devices, are based on a
different architecture, and are primarily used to support behavioral
designs and to implement complex counters, complex state machines,
arithmetic operations, wide inputs, and PAL crunchers.
CPLDfit
A program that reads in an NGD file and fits the design into the
selected CPLD architecture.
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daisy chain
A daisy chain is a series of bitstream files concatenated in one file. It
can be used to program several FPGAs connected in a daisy chain
board configuration.
dangling bus
A dangling bus connects to a component pin or net at one end and
unconnects at the other. A small filled box at the end of the bus
indicates a dangling bus.
dangling net
A dangling net connects to a component pin or net at one end and
unconnects at the other. A small filled box at the end of the net
indicates a dangling net.
Data2MEM
A program that transforms CPU execution code, or pure data, into
Block RAM initialization records.
debugging
Debugging is the process of reading back or probing the states of a
configured device to ensure that the device is behaving as expected
while in circuit.