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Development System Reference Guide www.xilinx.com 227
TRACE Reports
R
The maximum setup and hold times of device data inputs are listed relative to each
clock input. When two or more paths from a data input exist relative to a device clock
input, the worst-case setup and hold times are reported. One worst-case setup and
hold time is reported for each data input and clock input combination in the design.
Following is an example of an external setup/hold requirement in the data sheet
report:
Setup/Hold to clock ck1_i
------------+-------- -+----------+
| Setup to |Hold to |
Source Pad |clk (edge) |clk (edge)|
-------------+-----------+----------+
start_i |2.816(R) |0.000(R) |
-------------+-----------+----------+
• User-Defined Phase Relationships
Timing reports separate setup and hold requirements for user-defined internal clocks
in the data sheet report. User-defined external clock relationships are not reported
separately.
• Clock-to-Clock Setup and Hold Requirements
Timing will not report separate setup and hold requirements for internal clocks.
• Guaranteed Setup and Hold
Guaranteed setup and hold requirements in the speed files will supersede any
calculated setup and hold requirements made from detailed timing analysis. Timing
will not include phase shifting, DCM duty cycle distortion, and jitter into guaranteed
setup and hold requirements.
• Synchronous Propagation Delays
Timing accounts for clock phase relationships and DCM phase shifting for all primary
outputs with a primary clock input source, and reports separate clock-to-output and
maximum propagation delay ranges for each primary output covered by a timing
constraint.
The maximum propagation delay from clock inputs to device data outputs are listed
for each clock input. When two or more paths from a clock input to a data output exist,
the worst-case propagation delay is reported. One worst-case propagation delay is
reported for each data output and clock input combination.