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Development System Reference Guide www.xilinx.com 335
NetGen Static Timing Analysis Flow
R
Options for NetGen Static Timing Analysis Flow
This next section describes the supported NetGen command line options for static timing
analysis.
–aka (Write Also-Known-As Names as Comments)
The –aka option includes original user-defined identifiers as comments in the Verilog
netlist. This option is useful if user-defined identifiers are changed because of name
legalization processes in NetGen.
–bd (Block RAM Data File)
–bd [filename] [.elf|.mem]
The –bd switch specifies the path and file name of the .elf file used to populate the Block
RAM instances specified in the .bmm file. The address and data information contained in
the .elf file allows Data2MEM to determine which ADDRESS_BLOCK to place the data.
–dir (Directory Name)
–dir [directory_name]
The -dir option specifies the directory in which the output files are written.
–fn (Control Flattening a Netlist)
The –fn option produces a flattened netlist.
–intstyle (Integration Style)
–intstyle {ise | xflow | silent}
The –intstyle option reduces screen output based on the integration style you are running.
When using the –intstyle option, one of three modes must be specified: ise, xflow, or silent.
The mode sets the way information is displayed in the following ways:
–intstyle ise
This mode indicates the program is being run as part of an integrated design
environment.
–intstyle xflow
This mode indicates the program is being run as part of an integrated batch flow.
–intstyle silent
This mode limits screen output to warning and error messages only.
Note:
The -intstyle option is automatically invoked when running in an integrated environment, such
as Project Navigator or XFLOW.
–mhf (Multiple Hierarchical Files)
The –mhf option is used to write multiple hierarchical files, one for every module that has
the KEEP_HIERARCHY attribute.