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Development System Reference Guide www.xilinx.com 257
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Chapter 14
BitGen
BitGen is compatible with the following families:
• Virtex
™
, Virtex
™
-E
• Virtex
™
-II
• Virtex
™
-II Pro, Virtex
™
-II Pro X
• Virtex
™
-4
• Virtex
™
-5 LX
• Spartan
™
-II, Spartan
™
-IIE
• Spartan
™
-3, Spartan
™
-3E, Spartan
™
-3L
This chapter contains the following sections:
• “BitGen Overview”
• “BitGen Syntax”
• “BitGen Input Files”
• “BitGen Output Files”
• “BitGen Options”
BitGen Overview
BitGen produces a bitstream for Xilinx device configuration. After the design is completely
routed, it is necessary to configure the device so that it can execute the desired function.
This is done using files generated by BitGen, the Xilinx bitstream generation program.
BitGen takes a fully routed NCD (native circuit description) file as input and produces a
configuration bitstream—a binary file with a .bit extension.
The BIT file contains all of the configuration information from the NCD file that defines the
internal logic and interconnections of the FPGA, plus device-specific information from
other files associated with the target device. The binary data in the BIT file is then
downloaded into the FPGAs memory cells, or it is used to create a PROM file (see Chapter
16, “PROMGen”).