Xilinx 8.2i Life Jacket User Manual


 
Development System Reference Guide www.xilinx.com 267
BitGen Options
R
GWE_cycle
Selects the Startup phase that asserts the internal write enable to flip-flops, LUT RAMs,
and shift registers. It also enables the BRAMS. Before the Startup phase both BRAM
writing and reading are disabled.The Done setting asserts GWE when the DoneIn signal is
High. DoneIn is either the value of the Done pin or a delayed version if DonePipe=Yes. The
Keep setting is used to keep the current value of the GWE signal.
GTS_cycle
Selects the Startup phase that releases the internal 3-state control to the I/O buffers. The
Done setting releases GTS when the DoneIn signal is High. DoneIn is either the value of
the Done pin or a delayed version if DonePipe=Yes.
HswapenPin
Adds a pull-up, pull-down, or neither to the HSWAP_EN pin. The Pullnone option shows
there is no connection to either the pull-up or the pull-down.
Key0, Key1, Key2, Key3, Key4, Key5
Sets keyx for bitstream encryption. The pick option causes BitGen to select a random
number for the value.
Note:
For more information on encryption, see the following web site:
http://www.xilinx.com/products.
Architectures: Virtex, Virtex-E, Virtex-II, Virtex-II Pro, Virtex-4,
Spartan-II, Spartan-IIE, Spartan-3, Spartan-3E
Settings: 1, 2, 3, 4, 5, 6, Done, Keep
Default: 6
Architectures: Virtex, Virtex-E, Virtex-II, Virtex-II Pro, Virtex-4,
Spartan-II, Spartan-IIE, Spartan-3, Spartan-3E
Settings: Done, 1, 2, 3, 4, 5, 6, Keep
Default: 5
Architectures: Virtex-II, Virtex-4, Spartan-3, Spartan-3E
Settings: Pullup, Pulldown, Pullnone
Default: Pullup
Architectures: Virtex-II, Virtex-II Pro, Virtex-4
Settings: Pick, hex_string
Default: Pick