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Development System Reference Guide www.xilinx.com 309
R
Chapter 20
TA Eng in e
TAEngine is compatible with the following families:
• CoolRunner
™
XPLA3, CoolRunner
™
-II
• XC9500
™
, XC9500XL
™
, XC9500XV
™
This chapter describes the Timing Analysis Engine (TAEngine) program. TAEngine is a
command line executable that performs static timing analysis on implemented Xilinx
CPLD designs. This chapter includes the following sections:
• “TAEngine Overview”
• “TAEngine Syntax”
• “TAEngine Input Files”
• “TAEngine Output Files”
• “TAEngine Options”
TAEngine Overview
TAEngine takes an implemented CPLD design file (VM6) from CPLDfit and performs a
static timing analysis of the design’s timing components. The results of the static timing
analysis are written to a TAEngine report file (TIM) in summary or detail format.
The default output for TAEngine is a TIM report in summary format, which lists all timing
paths and their delays. A detail formatted TIM report, specified with the “–detail (Detail
Report)” option, lists all timing paths as well as a summary of all individual timing
components that comprise each path. Both the summary and detail formatted TIM reports
show the performance of all timing constraints contained in the design.