Xilinx 8.2i Life Jacket User Manual


 
330 www.xilinx.com Development System Reference Guide
Chapter 22: NetGen
R
Syntax for NetGen Equivalence Checking.
The following command runs the NetGen Equivalence Checking flow:
netgen -ecn [tool_name] [options] input_file[.ncd/.ngd] [ngm_file.ngm]
options is one or more of the options listed in the “Options for NetGen Equivalence
Checking Flow” section.
tool_name is a required switch that generates a netlist compatible with equivalence
checking tools. Valid tool_name arguments are conformal or formality. For additional
information on equivalence checking and formal verification tools, please refer to the
Synthesis and Simulation Design Guide.
input_file is the input NCD or NGD file. If an NGD file is used, the .ngd extension must be
specified.
ngm_file (optional, but recommended) is the input NGM file, which is a design file,
produced by MAP, that contains information about what was trimmed and transformed
during the MAP process.
To get help on command line usage for NetGen Timing Simulation, type:
netgen -h ecn
Input files for NetGen Equivalence Checking
The NetGen Equivalence Checking flow uses the following files as input:
NGD file—This file is a logical description of an unmapped FPGA design.
NCD file—This physical design file may be mapped only, partially or fully placed, or
partially or fully routed.
NGM file —This mapped design file is generated by MAP and contains information
on what was trimmed and transformed during the MAP process. See “–ngm (Design
Correlation File)” for more information.
ELF (MEM) (optional)—This file is used to populate the Block RAMs specified in the
.bmm file. See “–bd (Block RAM Data File)” for more information.
Figure 22-5: Post-Implementation Flow for FPGAs
X10034
Formal Verification Tool
NGM
Formal
Library
V
NCDELF
SVF/VXC
NetGen