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354 www.xilinx.com Development System Reference Guide
Chapter 23: XFLOW
R
–synth
–synth option_file
Note:
When using the –synth flow type, you must specify the –p option.
This flow type allows you to synthesize your design for implementation in an FPGA, for
fitting in a CPLD, or for compiling for functional simulation. The input design file can be a
Verilog or VHDL file.
You can use the -synth flow type alone or combine it with the -implement, -fit, or -fsim
flow type. If you use the -synth flow type alone, XFLOW invokes either the fpga.flw or
cpld.flw file and runs XST to synthesize your design. If you combine the -synth flow type
with the -implement, -fit, or -fsim flow type, XFLOW invokes the appropriate flow file,
runs XST to synthesize your design, and processes your design as described in one of the
following sections:
• “–implement (Implement an FPGA)”
• “–fit (Fit a CPLD)”
• “–fsim (Create a File for Functional Simulation)”
Synthesis Types
There are three different synthesis types that are described in the following sections.
XST
Use the following example to enter the XST command:
xflow -p xc2v250fg256-5 -synth xst_vhdl.opt design_name.vhd
If you have multiple VHDL or Verilog files, you can use a PRJ file that references these files
as input. Use the following example to enter the PRJ file:
xflow -p xc2v250fg256-5 -synth xst_vhdl.opt design_name.prj
Leonardo Spectrum
Use the following example to enter the Leonardo Spectrum command:
xflow -p xc2v250fg256-5 -synth leonardospectrum_vhdl.opt
design_name.vhd
If you have multiple VHDL files, you must list all of the source files in a text file, one per
line and pass that information to XFLOW using the –g (Specify a Global Variable) option.
Assume that the file that lists all source files is filelist.txt and design_name.vhd
is the top level design. Use the following example:
xflow -p xc2v250fg256-5 -g srclist:filelist.txt -synth
leonardospectrum_vhdl.opt design_name.vhd
The same rule applies for Verilog too.
Synplicity
Use the following example to enter the Synplicity command:
xflow -p xc2v250fg256-5 -synth synplicity_vhdl.opt design_name.vhd