Xilinx 8.2i Life Jacket User Manual


 
152 www.xilinx.com Development System Reference Guide
Chapter 7: MAP
R
Section 7 - RPMs
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xcounter/hset
Section 8 - Guide Report
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Guide not run on this design.
Section 9 - Area Group Summary
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No area groups were found in this design.
Section 10 - Modular Design Summary
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Modular Design not used for this design.
Section 11 - Timing Report
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This design was not run using timing mode.
Section 12 - Configuration String Details
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Use the "-detail" map option to print out Configuration Strings
Section 13 - Additional Device Resource Counts
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Number of JTAG Gates for IOBs = 27
Number of Equivalent Gates for Design = 7,487
Number of RPM Macros = 1
Number of Hard Macros = 0
CAPTUREs = 0
BSCANs = 0
STARTUPs = 0
PCILOGICs = 0
DCMs = 1
GCLKs = 1
ICAPs = 0
18X18 Multipliers = 0
Block RAMs = 0
TBUFs = 0
Total Registers (Flops & Latches in Slices & IOBs) not driven by LUTs=3
IOB Dual-Rate Flops not driven by LUTs = 0
IOB Dual-Rate Flops = 0
IOB Slave Pads = 0
IOB Master Pads = 0
IOB Latches not driven by LUTs = 0
IOB Latches = 0
IOB Flip Flops not driven by LUTs = 0
IOB Flip Flops = 0
Unbonded IOBs = 0
Bonded IOBs = 27
Total Shift Registers = 0
Static Shift Registers = 0
Dynamic Shift Registers = 0
16x1 ROMs = 0
16x1 RAMs = 0
32x1 RAMs = 0
Dual Port RAMs = 0
MUXFs = 1