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Development System Reference Guide www.xilinx.com 115
Logical DRC Checks
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• If the PAD is an output pad, the signal it is attached to can only be connected to one of
the following primitive outputs:
♦ A single buffer primitive output
♦ A single 3-state primitive output
♦ A single BSCAN primitive
In addition, the signal can also be connected to one of the following primitives:
♦ A single PULLUP primitive
♦ A single PULLDOWN primitive
♦ A single KEEPER primitive
Any other primitive output connections on the signal results in an error.
If the condition above is met, the output PAD signal may also be connected to one
clock buffer primitive input, one buffer primitive input, or both.
• If the PAD is a bidirectional or unbonded pad, the signal it is attached to must obey
the rules stated above for input and output pads. Any other primitive connections on
the signal results in an error. The signal connected to the pad must be configured as
both an input and an output signal; if it is not, you receive a warning.
• If the signal attached to the pad has a connection to a top-level symbol of the design,
that top-level symbol pin must have the same type as the pad pin, except that output
pads can be associated with 3-state top-level pins. A violation of this rule results in a
warning.
• If a signal is connected to multiple pads, an error is generated. If a signal is connected
to multiple top-level pins, a warning is generated.
Clock Buffer Check
The clock buffer configuration check verifies that the output of each clock buffer primitive
is connected to only inverter, flip-flop or latch primitive clock inputs, or other clock buffer
inputs. Violations are treated as warnings.
Name Check
The name check verifies the uniqueness of names on NGD objects using the following
criteria:
• Pin names must be unique within a symbol. A violation results in an error.
• Instance names must be unique within the instance’s position in the hierarchy (that is,
a symbol cannot have two symbols with the same name under it). A violation results
in a warning.
• Signal names must be unique within the signal’s hierarchical level (that is, if you push
down into a symbol, you cannot have two signals with the same name). A violation
results in a warning.
• Global signal names must be unique within the design. A violation results in a
warning.