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340 www.xilinx.com Development System Reference Guide
Chapter 22: NetGen
R
When there is a STARTUP block in the design, the STARTUP block hierarchical level is
preserved in the output netlist. The output of STARTUP is connected to the global GSR and
GTS signals.
For information on setting GSR and GTS for FPGAs, see the “Simulating VHDL” section of
the Synthesis and Simulation Design Guide.