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Development System Reference Guide www.xilinx.com 405
R
floorplanning
Floorplanning is the process of choosing the best grouping and
connectivity of logic in a design.
It is also the process of manually placing blocks of logic in an FPGA
where the goal is to increase density, routability, or performance.
flow
The flow is an ordered sequence of processes that are executed to
produce an implementation of a design.
FMAP
An FMAP is a symbol that defines mapping into a 4-input function
generator (F or G).
FPGA
Field Programmable Gate Array (FPGA), is a class of integrated
circuits pioneered by Xilinx in which the logic function is defined by
the customer using Xilinx development system software after the IC
has been manufactured and delivered to the end user. Gate arrays are
another type of IC whose logic is defined during the manufacturing
process. Xilinx supplies RAM-based FPGA devices.
FPGA applications include fast counters, fast pipelined designs,
register intensive designs, and battery powered multi-level logic.
function generator
A function generator is a look-up table or black box with three or four
inputs implementing any combinational functions of (2
2
)
4
or 256
functions or (2
2
)
2
or 65556 functions. The output is any value resulting
from the logical functions executed within the box. The function
generator implements a complete truth table, allowing speedy
prediction of the output.
functional simulation
Functional simulation is the process of identifying logic errors in your
design before it is implemented in a Xilinx device. Because timing
information for the design is not available, the simulator tests the logic
in the design using unit delays. Functional simulation is usually
performed at the early stages of the design process.
G
gate
A gate is an integrated circuit composed of several transistors and
capable of representing any primitive logic state, such as AND, OR,
XOR, or NOT inversion conditions. Gates are also called digital,
switching, or logic circuits.