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Development System Reference Guide www.xilinx.com 261
BitGen Options
R
The rawbits file consists of ASCII ones and zeros representing the data in the bitstream file.
If you are using a microprocessor to configure a single FPGA, you can include the rawbits
file in the source code as a text file to represent the configuration data. The sequence of
characters in the rawbits file is the same as the sequence of bits written into the FPGA.
–bd (Update Block Rams)
–bd file_name
The –bd option updates the bitstream with the block ram content from the specified ELF or
MEM file. See Chapter 24, “Data2MEM” for more information.
–d (Do Not Run DRC)
Do not run DRC (design rule check). Without the –d option, BitGen runs a DRC and saves
the DRC results in two output files: the BitGen report file (file_name.bgn) and the DRC file
(file_name.drc). If you enter the –d option, no DRC information appears in the report file
and no DRC file is produced.
Running DRC before a bitstream is produced detects any errors that could cause the FPGA
to malfunction. If DRC does not detect any errors, BitGen produces a bitstream file (unless
you use the –j option described in “–j (No BIT File)”).
–f (Execute Commands File)
–f command_file
The –f option executes the command line arguments in the specified command_file. For
more information on the –f option, see “–f (Execute Commands File)” in Chapter 1.
–g (Set Configuration)
The –g option specifies the startup timing and other bitstream options for Xilinx FPGAs.
The debug bitstream can only be used for master and slave serial configurations. It is not
valid for Boundary Scan or Slave Parallel/Select MAP. The settings for the –g option
depend on the architecture of the design. These settings are described in the following
section:
–g (Set Configuration—Virtex/-E/-II/-II Pro/-4 and Spartan-II/-IIE/-3/-3E)
The –g option has sub-options that represent settings you use to set the configuration for a
Virtex/-E/-II/-II Pro or Spartan-II/-IIE/3 design. These options have the following
syntax:
bitgen –g option:setting design.ncd design.bit design.pcf
For example, to enable Readback, use the following syntax:
bitgen –g Readback
The following sections describe the options and settings for the –g option. Each –g option
is listed with supported architectures, settings, and defaults.