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92 www.xilinx.com Development System Reference Guide
Chapter 3: Tcl
R
Note: Use the collection foreach command to list or get access to each object in a collection. See
foreach (iterate over elements in a collection) for more information.
Project Properties and Options
This following tables list all of the available project properties and batch tool options. The
first table lists all of the project properties. The remaining tables list all of the supported
batch tool options, by Xilinx synthesis or implementation tool.
Batch tool options are listed as text strings, which are distinguished by double quotes (“)
on the command line. The exact string representation, as shown in Project Navigator, is
required.
Example: % search “/stopwatch” -type instance
Description: In this example, the search command is used to find all instances in
the design.
Tcl Return: A collection of objects that match the search criteria. If no matches
are found, an empty collection is returned.
Table 3-6: Project Properties
Property Name Description
device The device to use for the project.
family The device family to use for the project.
generated_simulation_language The language of the generated simulation netlist.
name Name of the project.
package The device package to use for the project.
speed The device speed grade to use for the project.
synthesis_tool The synthesis tool to use for this project. The default
tool to use is XST.
top The top-level design module or entity.
top_level_module_type The module type of the top-level source.
Table 3-7: XST Options
Option Name Synthesis Tool
“Add I/O Buffers” XST
“Bus Delimiter” XST
“Case Implementation Style” XST
“Case” CST
“Constrain Placement” XST