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Chapter 15: BSDLAnno
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Modifications to the DESIGN_WARNING Section
BSDLAnno adds the following DESIGN_WARNING to the BSDL file:
"This BSDL file has been modified to reflect post-configuration"&
behavior by BSDLAnno. BSDLAnno does not modify the USER1,"&
USER2, or USERCODE registers. For details on the features and" &
limitations of BSDLAnno, please consult the Xilinx Development" &
System Reference Guide.";
Header Comments
BSDLAnno adds the following comments to the BSDL file header:
♦ BSDLAnno Post-Configuration File for design [entity name]
♦ BSDLAnno [BSDLAnno version number]
Boundary Scan Behavior in Xilinx Devices
BSDL files provided by Xilinx reflect the boundary scan behavior of an unconfigured
device. After configuration, the boundary scan behavior of a device may change. I/O pins
that were bidirectional before configuration may now be input-only. Boundary Scan test
vectors are typically derived from BSDL files; therefore, if boundary scan tests are going to
be performed on a configured Xilinx device, the BSDL file should be modified to reflect the
configured boundary scan behavior of the device.
Whenever possible, boundary scan tests should be performed on an unconfigured Xilinx
device. Unconfigured devices allow for better test coverage, because all I/Os are available
for bidirectional scan vectors.
In most cases, boundary scan tests with Xilinx devices must be performed after FPGA
configuration only under the following circumstances:
• When configuration cannot be prevented
• When differential signaling standards are used, unless the differential signals are
located between Xilinx devices, in which case both devices can be tested before
configuration. Each side of the differential pair will behave as a single-ended signal.