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30 www.xilinx.com Development System Reference Guide
Chapter 2: Design Flow
R
The following figure shows the standard Xilinx design flow.
Figure 2-1: Xilinx Design Flow
X9537
Design
Implementation
Optimization
FPGAs
Mapping
Placement
Routing
CPLDs
Fitting
Bitstream
Generation
Design
Synthesis
Design
Entry
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Design Verification
Functional
Simulation
Static Timing
Analysis
Timing
Simulation
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In-Circuit
Verification